Testing different interrupt delivery mechanisms

  • Thread starter Thread starter Simon J. Richter
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Simon J. Richter

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I'm building an FPGA based PCIe card, and would like to add Windows drivers for it at some point. The card supports interrupt delivery via emulated "legacy" PCI interrupts, and MSI (and should get MSI-X support later).

Is there a way I can instruct Windows to use a specific mechanism when loading the driver, and possibly also simulate specific failures (e.g. only one MSI available, even if the card requested four) to test degraded states?

The card can still work with fewer interrupts, but performance will suffer as I normally try to run send and receive operations on different CPU cores, so that is a rather different scenario from normal operation, hence the need for explicit testing.

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